MAX1818EUAT rev. a reliability report for MAX1818EUAT plastic encapsulated devices november 12, 2002 maxim integrated products 120 san gabriel dr. sunnyvale, ca 94086 written by reviewed by jim p edicord bryan j. preeshl quality assurance quality assurance reliability lab manager executive director
conclusion the max1818 successfully meets the quality and reliability standards required of all maxim products. in addition, maxim?s continu ous reliability monitoring program ensures that all outgoing product will continue to meet maxim?s quality and reliability standards. table of contents i. ........device description v. ........quality assurance information ii. ........manufacturin g information vi. .......reliability evaluation iii. .......packaging information iv. .......die information ......attachments i. device description a. general the max1818 low - dropout linear regulator operates from a +2.5v to +5.5v su pply and delivers a guaranteed 500ma load current with low 120mv dropout. the high - accuracy (1%) output voltage is preset at an internally trimmed voltage (see selector guide) or can be adjusted from 1.25v to 5.0v with an external resistive divider. an i nternal pmos pass transistor allows the low 125a supply current to remain independent of load, making this device ideal for portable battery - operated equipment such as personal digital assistants (pdas), cellular phones, cordless phones, base stations, an d notebook computers. other features include an active - low open - drain reset output that indicates when the output is out of regulation, a 0.1a shutdown, short - circuit protection, and thermal shutdown protection. the device is available in a miniature 800 mw 6 - pin sot23 package. b. absolute maximum ratings item rating in, shdn , pok, set to gnd - 0.3v to +6v out to gnd - 0.3v to (vin + 0.3v) output short - circuit duration 1min continuous power dissipation (ta = +70c) (note 1) 6 - pin sot2 3 (derate 10mw/c above +70c)800mw operating temperature range - 40c to +85c junction temperature +150c storage temperature range - 65c to +150c lead temperature (soldering, 10s) (note 2) +300c continuous power dissipation (ta = +70c) 10 - pin umax 444mw derates above +70 c 10 - pin umax 5.6mw/ c note 1: thermal properties are specified with product mounted on pc board with one square - inch of copper area and still air. with minimal copper, the sot23 package dissipates 712 mw at +70c. with a quarter square inch of copper, it will dissipate 790mw at +70c. copper should be equally shared between the in, out, and gnd pins. note 2: this device is constructed using a unique set of packaging techniques that imposes a limit on t he thermal profile to which the device can be exposed during board - level solder attach and rework. the limit permits only the use of the solder profiles recommended in the industry standard specification, ipc jedec - j - std - 020a, paragraph 7.6, table 3 for th e ir/vpr and convection reflow. preheating is required. hand or wave soldering is not allowed.
ii. manufacturing information a. description/function: 500ma low - dropout linear regulator in sot23 b. process: s8 - standard 8 micron silicon g ate cmos c. number of device transistors: 845 d. fabrication location: california, usa e. assembly location: malaysia or usa f. date of initial production: october, 2000 iii. packaging information a. package ty pe: 6 - lead sot flip - chip b. lead frame: copper c. lead finish: solder plate d. die attach: none e. bo ndwire: 6 mil dia. ball f. mold material: epoxy with silica filler g. assembly diagram: buildshee t # 05 - 2301 - 0052 h. flammability rating: class ul94 - v0 i. classification of moisture sensitivity per jedec standard jesd22 - a112: level 1 iv. die information a. dimensions: 90 x 45 mils b. passivation: si 3 n 4 /sio 2 (silicon nitride/ silicon dioxide) c. interconnect: tiw/ alcu/ tiwn d. backside metallization: none e. minimum metal width: .8 microns (as drawn) f. minimum metal spacing: .8 microns (as drawn) g. bondpad dimensions: 2.7 mil. sq. h . isolation dielectric: sio 2 i. die separation method: wafer saw
v. quality assurance information a. quality assurance contacts: jim pedicord (reliability lab manager) bryan preeshl ( executive director of qa) kenneth huening (vice pre sident) b. outgoing inspection level: 0.1% for all electrical parameters guaranteed by the datasheet. 0.1% for all visual defects. c. observed outgoing defect rate: < 50 ppm d. sampling plan: mil - std - 105d vi. reliability evaluation a. accelerated life test the results of the 135 c biased (static) life test are shown in table 1 . using these results, the failure rate ( l ) is calculated as follows: l = 1 = 1.83 (chi square value for mttf upper limit ) mttf 192 x 4389 x 317 x 2 temperature acceleration factor assuming an activation energy of 0.8ev l = 3.43 x 10 - 9 l = 3.43 f.i.t. (60% confidence level @ 25 c) this low failure rate represents data collected from max im?s reliability qualification and monitor programs. maxim also performs weekly burn - in on samples from production to assure reliability of its processes. the reliability required for lots which receive a burn - in qualification is 59 f.i.t. at a 60% confi dence level, which equates to 3 failures in an 80 piece sample. maxim performs failure analysis on rejects from lots exceeding this level. the burn - in schematic (spec.# 06 - 5597) shows the static circuit used for this test. maxim also performs 1000 hour life test monitors quarterly for each process. this data is published in the product reliability report ( rr - 1m ) located on the maxim website at http://www.maxim - ic.com . b. moisture resistance tests maxim evalu ates pressure pot stress from every assembly process during qualification of each new design. pressure pot testing must pass a 20% ltpd for acceptance. additionally, industry standard 85 c/85%rh or hast tests are performed quarterly per device/package fam ily. c. e.s.d. and latch - up testing the py69 die type has been found to have all pins able to withstand a transient pulse of 2000v, per mil - std - 883 method 3015 (reference attached esd test circuit). latch - up testing has shown that this device withsta nds a current of 250ma.
table 1 reliability evaluation test results MAX1818EUAT test item test condition failure sample number of identification size failures static life test (note 1) ta = 135 c dc parameters 317 0 biased & functionality time = 192 hrs. moisture testing (note 2) pressure pot ta = 121 c dc parameters 77 0 p = 15 psi. & functionality rh= 100% time = 168hrs. 85/85 ta = 85 c dc parameters 77 0 rh = 85% & fu nctionality biased time = 1000hrs. mechanical stress (note 2) temperature - 65 c/150 c dc parameters 77 0 cycle 1000 cycles method 1010 note 1: life test data may represent plastic d.i.p. qualification lots. note 2: gen eric process/package data
attachment #1 table ii. pin combination to be tested. 1 / 2 / 1/ table ii is restated in narrative form in 3.4 below. 2/ no connects are not to be tested. 3/ repeat pin combinat ion i for each named power supply and for ground (e.g., where v ps1 is v dd , v cc , v ss , v bb , gnd, +v s, - v s , v ref , etc). 3.4 pin combinations to be tested. a. each pin individually connected to terminal a with respect to the device ground pin(s) con nected to terminal b. all pins except the one being tested and the ground pin(s) shall be open. b. each pin individually connected to terminal a with respect to each different set of a combination of all named power supply pins (e.g., v ss1 , or v ss2 or v ss3 or v cc1 , or v cc2 ) connected to terminal b. all pins except the one being tested and the power supply pin or set of pins shall be open. c. each input and each output indiv idually connected to terminal a with respect to a combination of all the other input and output pins connected to terminal b. all pins except the input or output pin being tested and the combination of all the other input and output pins shall be open. terminal a (each pin individually connected to terminal a with the other floating) terminal b (the common combination of all like - named pins connected to terminal b) 1. all pins except v ps1 3/ all v ps1 pins 2. all input and output pins all other input - output pins mil std 883d method 3015.7 notice 8 regulated high voltage supply terminal d dut socket terminal c terminal b terminal a current probe (note 6) r = 1.5k w w c = 100pf short r2 s2 s1 r1 c1
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